As gate technology has advanced, circuit elements of semiconductor devices have been designed to be smaller and more densely packed. In the fabrication of gate stacks of such diminishing dimensions, such as, for example, stacks with gate lengths of less than 50 nm, two kinds of masks, known as “soft masks” (SM) and “hard masks” (HM) are increasingly used in the same fabrication process.
Soft masks typically comprise a photoresist (PR) material, which allows for patterning through conventional lithographic techniques using radiation. Hard masks, in turn, often comprise silicon-based materials such as for example, silicon oxides, silicon nitrides, silicon oxynitirides, and combinations or multilayers thereof. For example, one type of silicon-based material often used in hard mask applications is tetraethylorthosilicate (TEOS). Hard masks can, for example, serve to extend the resist budget of masking materials, provide for greater critical dimension (CD) control, and offer carbon free etching for better gate oxide selectivity.
Dual pre-doped gate stacks comprise a conductive material, such as polysilicon (poly-Si), doped with either n+ type dopants (such as, for example, P, N, As, Sb, and Bi) or p+ type dopants (such as, for example, B, Al, Ga, In, and Tl). The presence of gate stacks with both types of dopants on the same wafer can lead to fabrication challenges that may not necessarily exist with gate stacks having only a single type dopant. For instance, chlorine and bromine based plasmas have conventionally been used to etch poly silicon gate stacks due to their selectivity of etching poly silicon over other gate materials such as silicon oxide. However, when such plasmas are used to etch dual pre-doped stacks, n+ doped regions tend to etch much faster in both vertical and lateral directions than do p+ doped regions. This can result in undesirable profile differences between n+ and p+ doped poly-Si gate stacks.
As compared to chlorine or bromine based plasmas, fluorine based plasmas generally result in much smaller etching rate differences between n+ and p+ doped regions. Thus, in order to obtain minimum profile differences between n+ and p+ poly-Si gate stacks, fluorine based plasmas are generally preferred. However, fluorine based plasmas as compared to chlorine or bromine based plasmas have a much higher etch rate for silicon oxide materials, including hard mask materials such as TEOS. Accordingly, when using fluorine based plasmas to selectively etch poly silicon regions, it is typically necessary to mask off regions that comprise materials such as silicon oxide.
One method of masking silicon oxide regions during poly-Si etching, involves using carbon containing sources from the soft mask photoresist material. These carbon containing sources not only serve to protect hard mask material such as TEOS from being etched during poly-Si etching but can also serve as passivation layers on gate stack sidewalls, thereby resulting in straighter gate stacks. When such passivation material is not present, ‘necking’ can occur, for example, in the interface between pre-doped and non-doped Poly-Si layers.
Certain disadvantages, however, may result when using soft mask photoresist material as the major source to passivate gate sidewalls and block hard mask etching. Specifically, there may be processing steps where the presence of carbon containing sources from such material is generally not desirable.
For example, under certain processing conditions, carbon containing sources from photoresist material may react with material used to insulate the underlying substrate (often referred to as “gate oxide” material), thereby at least partially exposing the substrate. If these conditions are also favorable to etching the substrate (such as, for example, when the substrate comprises Si and a Br based plasma is being used), the integrity of the substrate, and hence the entire device, may be compromised.
In addition, as discussed above, one of the advantages for using a hard mask material is that it allows for reduced line width dimensions with better CD control than when soft mask alone is used. One method of obtaining such result involves trimming hard mask material using a process called chemical oxide reduction (COR). COR allows for the etching of hard mask material such as TEOS in a self limiting reaction, which occurs under particular process conditions involving, for example, hydrogen fluoride and ammonia. See e.g., U.S. Pat. No. 5,876,879, the entire disclosure of which is incorporated herein by reference. When carbon containing sources from soft mask photoresist material are continuously preserved and used to protect hard mask material during subsequent processing, conditions are not favorable for COR.
Accordingly, there is a continued need for methods of etching dual pre-doped gates that may overcome at least one disadvantage as discussed above.